Thursday February 18, 2021

There is one all-day short course on Thursday, which offers and in-depth learning experience on a specific topic. The short course consists of four talks by industry leading experts in a classroom-like format. The short course is targeted at experienced designers who wish to explore a new area in-depth.

PLLs, Clocking, and Clock Distribution

Introduction to PLLs: Phase Noise, Modeling, and Key Wireless Design Considerations
Behzad Razavi, UCLA

PLL Architectures, Tradeoffs, and Key Application Considerations 
Woogeun Rhee, Tsinghua University

Clocking, Clock Distribution, and Clock Management in Wireline/Wireless Subsystems
Mozhgan Mansuri, Intel

Processor Clock Generation, Distribution, and Clock Sensor/Management Loops
Phillip Restle, IBM

Download the 2021 ISSCC Advance Program