ISSCC 2013 Videos

Plenary Sessions

Architecting the Future through Heterogeneous Computing

Lisa Su, Senior Vice President and General Manager, Global Business Units, AMD, Austin, TX, US

“Smart Life Solutions” from Home to City

Yoshiyuki Miyabe, Managing Director and CTO, Panasonic, Osaka, Japan

Continuing to Shrink: Next-Generation Lithography – Progress and Prospects

Martin van den Brink, Executive Vice President and Chief Product & Technology Officer, ASML, Veldhoven, The Netherlands

The Evolution of Technology

Carver Mead, Professor Emeritus, Caltech, Pasadena, CA, USA

Demo Sessions

The Academic and Industrial Demonstration Sessions featured live demonstrations of selected ICs that were also presented by authors in regular paper sessions. These sessions are intended to exemplify the real-life applications made possible by new ICs presented at ISSCC.

3.1: 5.5GHz System z Microprocessor and Multichip Module

3.4: Jaguar: A Next-Generation Low-Power x86-64 Core

6.8: Experimental Demonstration of a Fully Digital Capacitive Sensor Interface Built Entirely Using Carbon-Nanotube FETs

7.6: A 1.23pJ/b 2.5Gb/s Monolithically Integrated Optical Carrier-Injection Ring Modulator and All-Digital Driver Circuit in Commercial 45nm SOI

8.7: A Low-Cost Miniature 120GHz SiP FMCW/CW Radar Sensor with Software Linearization

9.5: A 249Mpixel/s HEVC Video-Decoder Chip for Quad Full HD Applications

9.6: Reconfigurable Processor for Energy-Scalable Computational Photography

9.8: A 646GOPS/W Multi-Classifier Many-Core Processor With Cortex-Like Architecture for Super-Resolution Recognition

10.5: A 4Ω 2.3W Class-D Audio Amplifier with Embedded DC-DC Boost Converter, Current-Sensing ADC and DSP for Adaptive Speaker Protection

11.3: A Versatile Timing Microsystem Based on Wafer-Level Packaged XTAL/BAW Resonators with Sub-µW RTC Mode and Programmable HF Clocks

11.5: A 0.15mm-Thick Non-Contact Connector for MIPI Using Vertical Directional Coupler

11.6: 1.2Gb/s 3.9pJ/b Mono-Phase Pulse-Modulation Inductive-Coupling Transceiver for mm-Range Board-to-Board Communication

13.1: A Fully Integrated 60GHz CMOS Transceiver Chipset Based on WiGig/IEEE802.11ad with Built-In Self Calibration for Mobile Applications

16.1: A Fully Integrated 8-Channel Closed-Loop Neural-Prosthetic SoC for Real-Time Epileptic Seizure Control

17.1: A 6.4Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems

22.5: A 55dB SNR with 240Hz Frame Scan Rate Mutual Capacitor 30×24 Touch-Screen Panel Read-Out IC Using Code-Division Multiple Sensing Technique

23.2: A Scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-Lane Parallel I/O in 32nm CMOS

23.4: A 5.5Gb/s 5mm Contactless Interface Containing a 50Mb/s Bidirectional Sub-Channel Employing Common-Mode OOK Signaling

24.6: Reliable and Energy-Efficient 1MHz 0.4V Dynamically Reconfigurable SoC for ExG Applications in 40nm LP CMOS

24.7: An 8MHz 75µA/MHz Zero-Leakage Non-Volatile Logic-Based Cortex-M0 MCU SoC Exhibiting 100% Digital State Retention at VDD=0V with <400ns Wakeup and Sleep Transitions

24.8: A 100GB/s Wide I/O with 4096b TSVs Through an Active Silicon Interposer with In-Place Waveform Capturing

25.4: A 1.9nJ/b 2.4GHz Multistandard (Bluetooth Low Energy/Zigbee/IEEE802.15.6) Transceiver for Personal/Body-Area Networks

25.7: A 5.5mW IEEE-802.15.6 Wireless Body-Area-Network Standard Transceiver for Multichannel Electro-Acupuncture Application

26.1: A 10.3GS/s 6b Flash ADC for 10G Ethernet Applications

27.7: 3D Camera Based on Linear-Mode Gain-Modulated Avalanche Photodiodes